Information

Chapter 4
Memory Map
4.1 Introduction
This device contains various memories and memory-mapped peripherals which are
located in one 32-bit contiguous memory space. This chapter describes the memory and
peripheral locations within that memory space.
4.2 System memory map
The following table shows the high-level device memory map.
Table 4-1. System memory map
System 32-bit Address Range Destination Slave Access
0x0000_0000–0x07FF_FFFF Program flash and read-only data
(Includes exception vectors in first 1024 bytes)
All masters
0x0800_0000–0x0FFF_FFFF Reserved —
0x1000_0000–0x13FF_FFFF • For MK20DN32VLH5: Reserved
• For MK20DX32VLH5: FlexNVM
• For MK20DN64VLH5: Reserved
• For MK20DX64VLH5: FlexNVM
• For MK20DN128VLH5: Reserved
• For MK20DX128VLH5: FlexNVM
• For MK20DN32VMP5: Reserved
• For MK20DX32VMP5: FlexNVM
• For MK20DN64VMP5: Reserved
• For MK20DX64VMP5: FlexNVM
• For MK20DN128VMP5: Reserved
• For MK20DX128VMP5: FlexNVM
All masters
0x1400_0000–0x17FF_FFFF FlexRAM All masters
0x1800_0000–0x1BFF_FFFF Reserved —
0x1C00_0000–0x1FFF_FFFF SRAM_L: Lower SRAM (ICODE/DCODE) All masters
0x2000_0000–0x200F_FFFF SRAM_U: Upper SRAM bitband region All masters
Table continues on the next page...
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 131