Information

Program flash
Flash configuration field
FlexNVM base address
Program flash base address
Flash memory base address
Registers
FlexNVM
FlexRAM
FlexRAM base address
Figure 4-2. Flash memory map
4.3.1 Alternate Non-Volatile IRC User Trim Description
The following non-volatile locations (4 bytes) are reserved for custom IRC user trim
supported by some development tools. An alternate IRC trim to the factory loaded trim
can be stored at this location. To override the factory trim, user software must load new
values into the MCG trim registers.
Non-Volatile Byte Address Alternate IRC Trim Value
0x0000_03FC Reserved
0x0000_03FD Reserved
0x0000_03FE (bit 0) SCFTRIM
0x0000_03FE (bit 4:1) FCTRIM
0x0000_03FF SCTRIM
4.4 SRAM memory map
The on-chip RAM is split evenly among SRAM_L and SRAM_U. The RAM is also
implemented such that the SRAM_L and SRAM_U ranges form a contiguous block in
the memory map. See SRAM Arrays for details.
Accesses to the SRAM_L and SRAM_U memory ranges outside the amount of RAM on
the device causes the bus cycle to be terminated with an error followed by the appropriate
response in the requesting bus master.
SRAM memory map
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
134 Freescale Semiconductor, Inc.