Information

NOTE
The trace clock frequency observed at the TRACE_CLKOUT
pin will be half that of the selected clock source.
5.7.4 PORT digital filter clocking
The digital filters in each of the PORTx modules can be clocked as shown in the
following figure.
NOTE
In stop mode, the digital input filters are bypassed unless they
are configured to run from the 1 kHz LPO clock source.
PORTx_DFCR[CS]
PORTx digital input
filter clock
Bus clock
LPO
Figure 5-4. PORTx digital input filter clock generation
5.7.5 LPTMR clocking
The prescaler and glitch filters in each of the LPTMRx modules can be clocked as shown
in the following figure.
NOTE
The chosen clock must remain enabled if the LPTMRx is to
continue operating in all required low-power modes.
Chapter 5 Clock Distribution
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 149