Information

Chapter 6
Reset and Boot
6.1 Introduction
The following reset sources are supported in this MCU:
Table 6-1. Reset sources
Reset sources Description
POR reset Power-on reset (POR)
System resets External pin reset (PIN)
Low-voltage detect (LVD)
Computer operating properly (COP) watchdog reset
Low leakage wakeup (LLWU) reset
Multipurpose clock generator loss of clock (LOC) reset
Multipurpose clock generator loss of lock (LOL) reset
Stop mode acknowledge error (SACKERR)
Software reset (SW)
Lockup reset (LOCKUP)
EzPort reset
MDM DAP system reset
Debug reset JTAG reset
nTRST reset
Each of the system reset sources, with the exception of the EzPort and MDM-AP reset,
has an associated bit in the system reset status (SRS) registers. See the Reset Control
Module for register details.
The MCU exits reset in functional mode that is controlled by
EZP_CS pin to select
between the single chip (default) or serial flash programming (EzPort) modes. See Boot
options for more details.
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 153