Information

Table 10-3. SWD Signal Descriptions
Chip signal name Module signal
name
Description I/O
SWD_DIO JTAG_TMS/
SWD_DIO
Serial Wire Data I/O
SWD_CLK JTAG_TCLK/
SWD_CLK
Serial Wire Clock I
Table 10-4. TPIU Signal Descriptions
Chip signal name Module signal
name
Description I/O
TRACE_SWO JTAG_TDO/
TRACE_SWO
Trace output data from the ARM CoreSight debug block over a
single pin
O
10.4.2 System Modules
Table 10-5. System Signal Descriptions
Chip signal name Module signal
name
Description I/O
NMI Non-maskable interrupt
NOTE: Driving the NMI signal low forces a non-maskable
interrupt, if the NMI function is selected on the
corresponding pin.
I
RESET Reset bi-directional signal I/O
VDD MCU power I
VSS MCU ground I
Table 10-6. EWM Signal Descriptions
Chip signal name Module signal
name
Description I/O
EWM_IN EWM_in EWM input for safety status of external safety circuits. The polarity
of EWM_in is programmable using the EWM_CTRL[ASSIN] bit.
The default polarity is active-low.
I
EWM_OUT EWM_out EWM reset out signal O
Chapter 10 Signal Multiplexing and Signal Descriptions
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 199