Information

Table 10-20. UART 2 Signal Descriptions (continued)
Chip signal name Module signal
name
Description I/O
UART2_RTS RTS Request to send O
UART2_TX TXD Transmit data O
UART2_RX RXD Receive data I
Table 10-21. I
2
S0 Signal Descriptions
Chip signal name Module signal
name
Description I/O
I2S0_MCLK SAI_MCLK Audio Master Clock I/O
I2S0_RX_BCLK SAI_RX_BCLK Receive Bit Clock I/O
I2S0_RX_FS SAI_RX_SYNC Receive Frame Sync I/O
I2S0_RXD SAI_RX_DATA Receive Data I
I2S0_TX_BCLK SAI_TX_BCLK Transmit Bit Clock I/O
I2S0_TX_FS SAI_TX_SYNC Transmit Frame Sync I/O
I2S0_TXD SAI_TX_DATA Transmit Data O
10.4.7 Human-Machine Interfaces (HMI)
Table 10-22. GPIO Signal Descriptions
Chip signal name Module signal
name
Description I/O
PTA[31:0]
1
PORTA31–PORTA0 General-purpose input/output I/O
PTB[31:0]
1
PORTB31–PORTB0 General-purpose input/output I/O
PTC[31:0]
1
PORTC31–PORTC0 General-purpose input/output I/O
PTD[31:0]
1
PORTD31–PORTD0 General-purpose input/output I/O
PTE[31:0]
1
PORTE31–PORTE0 General-purpose input/output I/O
1. The available GPIO pins depends on the specific package. See the signal multiplexing section for which exact GPIO
signals are available.
Table 10-23. TSI 0 Signal Descriptions
Chip signal name Module signal
name
Description I/O
TSI0_CH[15:0] TSI_IN[15:0] TSI pins. Switchable driver that connects directly to the electrode
pins TSI[15:0] can operate as GPIO pins
I/O
Chapter 10 Signal Multiplexing and Signal Descriptions
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 203