Information

PORT memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4004_C064 Pin Control Register n (PORTD_PCR25) 32 R/W See section 11.4.1/213
4004_C068 Pin Control Register n (PORTD_PCR26) 32 R/W See section 11.4.1/213
4004_C06C Pin Control Register n (PORTD_PCR27) 32 R/W See section 11.4.1/213
4004_C070 Pin Control Register n (PORTD_PCR28) 32 R/W See section 11.4.1/213
4004_C074 Pin Control Register n (PORTD_PCR29) 32 R/W See section 11.4.1/213
4004_C078 Pin Control Register n (PORTD_PCR30) 32 R/W See section 11.4.1/213
4004_C07C Pin Control Register n (PORTD_PCR31) 32 R/W See section 11.4.1/213
4004_C080 Global Pin Control Low Register (PORTD_GPCLR) 32
W
(always
reads
zero)
0000_0000h 11.4.2/216
4004_C084 Global Pin Control High Register (PORTD_GPCHR) 32
W
(always
reads
zero)
0000_0000h 11.4.3/216
4004_C0A0 Interrupt Status Flag Register (PORTD_ISFR) 32 w1c 0000_0000h 11.4.4/217
4004_D000 Pin Control Register n (PORTE_PCR0) 32 R/W See section 11.4.1/213
4004_D004 Pin Control Register n (PORTE_PCR1) 32 R/W See section 11.4.1/213
4004_D008 Pin Control Register n (PORTE_PCR2) 32 R/W See section 11.4.1/213
4004_D00C Pin Control Register n (PORTE_PCR3) 32 R/W See section 11.4.1/213
4004_D010 Pin Control Register n (PORTE_PCR4) 32 R/W See section 11.4.1/213
4004_D014 Pin Control Register n (PORTE_PCR5) 32 R/W See section 11.4.1/213
4004_D018 Pin Control Register n (PORTE_PCR6) 32 R/W See section 11.4.1/213
4004_D01C Pin Control Register n (PORTE_PCR7) 32 R/W See section 11.4.1/213
4004_D020 Pin Control Register n (PORTE_PCR8) 32 R/W See section 11.4.1/213
4004_D024 Pin Control Register n (PORTE_PCR9) 32 R/W See section 11.4.1/213
4004_D028 Pin Control Register n (PORTE_PCR10) 32 R/W See section 11.4.1/213
4004_D02C Pin Control Register n (PORTE_PCR11) 32 R/W See section 11.4.1/213
4004_D030 Pin Control Register n (PORTE_PCR12) 32 R/W See section 11.4.1/213
4004_D034 Pin Control Register n (PORTE_PCR13) 32 R/W See section 11.4.1/213
4004_D038 Pin Control Register n (PORTE_PCR14) 32 R/W See section 11.4.1/213
4004_D03C Pin Control Register n (PORTE_PCR15) 32 R/W See section 11.4.1/213
4004_D040 Pin Control Register n (PORTE_PCR16) 32 R/W See section 11.4.1/213
4004_D044 Pin Control Register n (PORTE_PCR17) 32 R/W See section 11.4.1/213
4004_D048 Pin Control Register n (PORTE_PCR18) 32 R/W See section 11.4.1/213
4004_D04C Pin Control Register n (PORTE_PCR19) 32 R/W See section 11.4.1/213
Table continues on the next page...
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
212 Freescale Semiconductor, Inc.