Information

12.2.2 SOPT1 Configuration Register (SIM_SOPT1CFG)
NOTE
The SOPT1CFG register is reset on System Reset not VLLS.
Address: SIM_SOPT1CFG is 4004_7000h base + 4h offset = 4004_7004h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
USSWE
UVSWE
URWE
0 0 0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
SIM_SOPT1CFG field descriptions
Field Description
31–27
Reserved
This read-only field is reserved and always has the value zero.
26
USSWE
USB voltage regulator stop standby write enable
Writing one to the USSWE bit allows the SOPT1 USBSSTBY bit to be written. This register bit clears after
a write to USBSSTBY.
0 SOPT1 USBSSTBY cannot be written.
1 SOPT1 USBSSTBY can be written.
25
UVSWE
USB voltage regulator VLP standby write enable
Writing one to the UVSWE bit allows the SOPT1 USBVSTBY bit to be written. This register bit clears after
a write to USBVSTBY.
0 SOPT1 USBVSTBY cannot be written.
1 SOPT1 USBVSTBY can be written.
24
URWE
USB voltage regulator enable write enable
Writing one to the URWE bit allows the SOPT1 USBREGEN bit to be written. This register bit clears after
a write to USBREGEN.
0 SOPT1 USBREGEN cannot be written.
1 SOPT1 USBREGEN can be written.
23–10
Reserved
This read-only field is reserved and always has the value zero.
9–8
Reserved
This read-only field is reserved and always has the value zero.
7–0
Reserved
This read-only field is reserved and always has the value zero.
Chapter 12 System Integration Module (SIM)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 225