Information

12.2.4 System Options Register 4 (SIM_SOPT4)
Address: SIM_SOPT4 is 4004_7000h base + 100Ch offset = 4004_800Ch
Bit 31 30 29 28 27 26 25 24
R
0 0
FTM0TRG0SRC
0 0
FTM1CLKSEL FTM0CLKSEL
W
Reset
0 0 0 0 0 0 0 0
Bit
23 22 21 20 19 18 17 16
R
0 0
FTM1CH0SRC
0
W
Reset
0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8
R
0 0
W
Reset
0 0 0 0 0 0 0 0
Bit
7 6 5 4 3 2 1 0
R
0
FTM1FLT0
0 0
FTM0FLT1 FTM0FLT0
W
Reset
0 0 0 0 0 0 0 0
SIM_SOPT4 field descriptions
Field Description
31–30
Reserved
This read-only field is reserved and always has the value zero.
29
Reserved
This read-only field is reserved and always has the value zero.
28
FTM0TRG0SRC
FlexTimer 0 Hardware Trigger 0 Source Select
Selects the source of FTM0 hardware trigger 0.
Table continues on the next page...
Chapter 12 System Integration Module (SIM)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 229