Information

12.2.5 System Options Register 5 (SIM_SOPT5)
Address: SIM_SOPT5 is 4004_7000h base + 1010h offset = 4004_8010h
Bit 31 30 29 28 27 26 25 24
R
0
W
Reset
0 0 0 0 0 0 0 0
Bit
23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8
R
0
W
Reset
0 0 0 0 0 0 0 0
Bit
7 6 5 4 3 2 1 0
R
UART1RXSRC
0
UART1TXSRC
UART0RXSRC
0
UART0TXSRC
W
Reset
0 0 0 0 0 0 0 0
SIM_SOPT5 field descriptions
Field Description
31–8
Reserved
This read-only field is reserved and always has the value zero.
7–6
UART1RXSRC
UART 1 receive data source select
Selects the source for the UART 1 receive data.
00 UART1_RX pin
01 CMP0
10 CMP1
11 Reserved
5
Reserved
This read-only field is reserved and always has the value zero.
4
UART1TXSRC
UART 1 transmit data source select
Selects the source for the UART 1 transmit data.
0 UART1_TX pin
1 UART1_TX pin modulated with FTM1 channel 0 output
3–2
UART0RXSRC
UART 0 receive data source select
Selects the source for the UART 0 receive data.
00 UART0_RX pin
Table continues on the next page...
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
232 Freescale Semiconductor, Inc.