Information

SIM_SCGC4 field descriptions (continued)
Field Description
12
UART2
UART2 Clock Gate Control
This bit controls the clock gate to the UART2 module.
0 Clock disabled
1 Clock enabled
11
UART1
UART1 Clock Gate Control
This bit controls the clock gate to the UART1 module.
0 Clock disabled
1 Clock enabled
10
UART0
UART0 Clock Gate Control
This bit controls the clock gate to the UART0 module.
0 Clock disabled
1 Clock enabled
9–8
Reserved
This read-only field is reserved and always has the value zero.
7
Reserved
This read-only field is reserved and always has the value zero.
6
I2C0
I2C0 Clock Gate Control
This bit controls the clock gate to the I
2
C0 module.
0 Clock disabled
1 Clock enabled
5–4
Reserved
This read-only field is reserved and always has the value one.
3
Reserved
This read-only field is reserved and always has the value zero.
2
CMT
CMT Clock Gate Control
This bit controls the clock gate to the CMT module.
0 Clock disabled
1 Clock enabled
1
EWM
EWM Clock Gate Control
This bit controls the clock gate to the EWM module.
0 Clock disabled
1 Clock enabled
0
Reserved
This read-only field is reserved and always has the value zero.
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
238 Freescale Semiconductor, Inc.