Information

SIM_SCGC6 field descriptions (continued)
Field Description
0 Clock disabled
1 Clock enabled
11–10
Reserved
This read-only field is reserved and always has the value zero.
9
Reserved
This read-only field is reserved and always has the value zero.
8–5
Reserved
This read-only field is reserved and always has the value zero.
4
Reserved
This read-only field is reserved and always has the value zero.
3–2
Reserved
This read-only field is reserved and always has the value zero.
1
DMAMUX
DMA Mux Clock Gate Control
This bit controls the clock gate to the DMA Mux module.
0 Clock disabled
1 Clock enabled
0
FTFL
Flash Memory Clock Gate Control
This bit controls the clock gate to the flash memory. Flash reads are still supported while the flash
memory is clock gated, but entry into low power modes is blocked.
0 Clock disabled
1 Clock enabled
12.2.11 System Clock Gating Control Register 7 (SIM_SCGC7)
Address: SIM_SCGC7 is 4004_7000h base + 1040h offset = 4004_8040h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 0
DMA
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
SIM_SCGC7 field descriptions
Field Description
31–3
Reserved
This read-only field is reserved and always has the value zero.
2
Reserved
This read-only field is reserved and always has the value zero.
1
DMA
DMA Clock Gate Control
Table continues on the next page...
Chapter 12 System Integration Module (SIM)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 243