Information

Section Number Title Page
36.3.2 Timer Load Value Register (PIT_LDVALn)...............................................................................................823
36.3.3 Current Timer Value Register (PIT_CVALn).............................................................................................823
36.3.4 Timer Control Register (PIT_TCTRLn)......................................................................................................824
36.3.5 Timer Flag Register (PIT_TFLGn)..............................................................................................................824
36.4 Functional description...................................................................................................................................................825
36.4.1 General operation.........................................................................................................................................825
36.4.2 Interrupts......................................................................................................................................................826
36.5 Initialization and application information.....................................................................................................................827
Chapter 37
Low-Power Timer (LPTMR)
37.1 Introduction...................................................................................................................................................................829
37.1.1 Features........................................................................................................................................................829
37.1.2 Modes of operation......................................................................................................................................829
37.2 LPTMR signal descriptions..........................................................................................................................................830
37.2.1 Detailed signal descriptions.........................................................................................................................830
37.3 Memory map and register definition.............................................................................................................................831
37.3.1 Low Power Timer Control Status Register (LPTMRx_CSR)......................................................................831
37.3.2 Low Power Timer Prescale Register (LPTMRx_PSR)................................................................................833
37.3.3 Low Power Timer Compare Register (LPTMRx_CMR).............................................................................834
37.3.4 Low Power Timer Counter Register (LPTMRx_CNR)...............................................................................835
37.4 Functional description...................................................................................................................................................835
37.4.1 LPTMR power and reset..............................................................................................................................835
37.4.2 LPTMR clocking..........................................................................................................................................835
37.4.3 LPTMR prescaler/glitch filter......................................................................................................................836
37.4.4 LPTMR compare..........................................................................................................................................837
37.4.5 LPTMR counter...........................................................................................................................................837
37.4.6 LPTMR hardware trigger.............................................................................................................................838
37.4.7 LPTMR interrupt..........................................................................................................................................838
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
30 Freescale Semiconductor, Inc.