Information

DMA_CEEI field descriptions (continued)

Field Description

1–0

CEEI

Clear Enable Error Interrupt

Clears the corresponding bit in EEI

21.3.6 Set Enable Error Interrupt Register (DMA_SEEI)

The SEEI provides a simple memory-mapped mechanism to set a given bit in the EEI to

enable the error interrupt for a given channel. The data value on a register write causes

the corresponding bit in the EEI to be set. Setting the SAEE bit provides a global set

function, forcing the entire EEI contents to be set. If the NOP bit is set, the command is

ignored. This allows you to write multiple-byte registers as a 32-bit word. Reads of this

Address: DMA_SEEI is 4000_8000h base + 19h offset = 4000_8019h

Bit 7 6 5 4 3 2 1 0

Write NOP SAEE 0 SEEI

Reset

0 0 0 0 0 0 0 0

DMA_SEEI field descriptions

Field Description

NOP

0 Normal operation

1 No operation, ignore the other bits in this register

SAEE

Sets All Enable Error Interrupts

0 Set only the EEI bit specified in the SEEI field.

1 Sets all bits in EEI

5–2

Reserved

This field is reserved.

1–0

SEEI

Set Enable Error Interrupt

Sets the corresponding bit in EEI

Chapter 21 Direct Memory Access Controller (eDMA)

K20 Sub-Family Reference Manual, Rev. 2, Feb 2012

Freescale Semiconductor, Inc. 349