Information

21.3.8 Set Enable Request Register (DMA_SERQ)

The SERQ provides a simple memory-mapped mechanism to set a given bit in the ERQ

to enable the DMA request for a given channel. The data value on a register write causes

the corresponding bit in the ERQ to be set. Setting the SAER bit provides a global set

function, forcing the entire contents of ERQ to be set. If the NOP bit is set, the command

is ignored. This allows you to write multiple-byte registers as a 32-bit word. Reads of this

Address: DMA_SERQ is 4000_8000h base + 1Bh offset = 4000_801Bh

Bit 7 6 5 4 3 2 1 0

Write NOP SAER 0 SERQ

Reset

0 0 0 0 0 0 0 0

DMA_SERQ field descriptions

Field Description

NOP

0 Normal operation

1 No operation, ignore the other bits in this register

SAER

Set All Enable Requests

0 Set only the ERQ bit specified in the SERQ field

1 Set all bits in ERQ

5–2

Reserved

This field is reserved.

1–0

SERQ

Set enable request

Sets the corresponding bit in ERQ

Chapter 21 Direct Memory Access Controller (eDMA)

K20 Sub-Family Reference Manual, Rev. 2, Feb 2012

Freescale Semiconductor, Inc. 351