Information

DMA_TCDn_BITER_ELINKYES field descriptions (continued)
Field Description
0 The channel-to-channel linking is disabled
1 The channel-to-channel linking is enabled
14–11
Reserved
This read-only field is reserved and always has the value zero.
10–9
LINKCH
Link Channel Number
If channel-to-channel linking is enabled (ELINK = 1), then after the minor loop is exhausted, the eDMA
engine initiates a channel service request at the channel defined by these four bits by setting that
channel’s TCDn_CSR[START] bit.
NOTE: When the software loads the TCD, this field must be set equal to the corresponding CITER field.
Otherwise, a configuration error is reported. As the major iteration count is exhausted, the
contents of this field is reloaded into the CITER field.
8–0
BITER
Starting Major Iteration Count
As the transfer control descriptor is first loaded by software, this 9-bit (ELINK = 1) or 15-bit (ELINK = 0)
field must be equal to the value in the CITER field. As the major iteration count is exhausted, the contents
of this field are reloaded into the CITER field.
NOTE: When the software loads the TCD, this field must be set equal to the corresponding CITER field.
Otherwise, a configuration error is reported. As the major iteration count is exhausted, the
contents of this field is reloaded into the CITER field. If the channel is configured to execute a
single service request, the initial values of BITER and CITER should be 0x0001.
21.3.31 TCD Beginning Minor Loop Link, Major Loop Count (Channel
Linking Disabled) (DMA_TCD_BITER_ELINKNO)
If the TCDn_BITER[ELINK] bit is cleared, the TCDn_BITER register is defined as
follows.
Addresses: TCD0_BITER_ELINKNO is 4000_8000h base + 101Eh offset = 4000_901Eh
TCD1_BITER_ELINKNO is 4000_8000h base + 103Eh offset = 4000_903Eh
TCD2_BITER_ELINKNO is 4000_8000h base + 105Eh offset = 4000_905Eh
TCD3_BITER_ELINKNO is 4000_8000h base + 107Eh offset = 4000_907Eh
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
ELINK
BITER
Write
Reset
x* x* x* x* x* x* x* x* x* x* x* x* x* x* x* x*
* Notes:
x = Undefined at reset.•
Chapter 21 Direct Memory Access Controller (eDMA)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 373