Information

Section Number Title Page
44.4 Functional description...................................................................................................................................................1023
44.4.1 I2C protocol.................................................................................................................................................1023
44.4.2 10-bit address...............................................................................................................................................1028
44.4.3 Address matching.........................................................................................................................................1030
44.4.4 System management bus specification........................................................................................................1030
44.4.5 Resets...........................................................................................................................................................1033
44.4.6 Interrupts......................................................................................................................................................1033
44.4.7 Programmable input glitch filter..................................................................................................................1035
44.4.8 Address matching wakeup...........................................................................................................................1036
44.4.9 DMA support...............................................................................................................................................1036
44.5 Initialization/application information...........................................................................................................................1037
Chapter 45
Universal Asynchronous Receiver/Transmitter (UART)
45.1 Introduction...................................................................................................................................................................1041
45.1.1 Features........................................................................................................................................................1041
45.1.2 Modes of operation......................................................................................................................................1043
45.2 UART signal descriptions.............................................................................................................................................1044
45.2.1 Detailed signal descriptions.........................................................................................................................1045
45.3 Memory map and registers............................................................................................................................................1046
45.3.1 UART Baud Rate Registers: High (UARTx_BDH)....................................................................................1053
45.3.2 UART Baud Rate Registers: Low (UARTx_BDL).....................................................................................1054
45.3.3 UART Control Register 1 (UARTx_C1).....................................................................................................1055
45.3.4 UART Control Register 2 (UARTx_C2).....................................................................................................1057
45.3.5 UART Status Register 1 (UARTx_S1)........................................................................................................1058
45.3.6 UART Status Register 2 (UARTx_S2)........................................................................................................1061
45.3.7 UART Control Register 3 (UARTx_C3).....................................................................................................1063
45.3.8 UART Data Register (UARTx_D)...............................................................................................................1065
45.3.9 UART Match Address Registers 1 (UARTx_MA1)....................................................................................1066
45.3.10 UART Match Address Registers 2 (UARTx_MA2)....................................................................................1067
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
38 Freescale Semiconductor, Inc.