Information

For all error types other than channel priority error, the channel number causing the error
is recorded in the ES register. If the error source is not removed before the next activation
of the problem channel, the error is detected and recorded again.
If priority levels are not unique, when any channel requests service, a channel priority
error is reported. The highest channel priority with an active request is selected, but the
lowest numbered channel with that priority is selected by arbitration and executed by the
eDMA engine. The hardware service request handshake signals, error interrupts, and
error reporting is associated with the selected channel.
21.5.3 Arbitration mode considerations
21.5.3.1 Fixed channel arbitration
In this mode, the channel service request from the highest priority channel is selected to
execute.
21.5.3.2 Round-robin channel arbitration
Channels are serviced starting with the highest channel number and rotating through to
the lowest channel number without regard to the channel priority levels.
21.5.4 Performing DMA transfers (examples)
21.5.4.1 Single request
To perform a simple transfer of n bytes of data with one activation, set the major loop to
one (TCDn_CITER = TCDn_BITER = 1). The data transfer begins after the channel
service request is acknowledged and the channel is selected to execute. After the transfer
is complete, the TCDn_CSR[DONE] bit is set and an interrupt generates if properly
enabled.
For example, the following TCD entry is configured to transfer 16 bytes of data. The
eDMA is programmed for one iteration of the major loop transferring 16 bytes per
iteration. The source memory has a byte wide memory port located at 0x1000. The
destination memory has a 32-bit port located at 0x2000. The address offsets are
Initialization/application information
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
386 Freescale Semiconductor, Inc.