Information

22.1.2.2 Wait Mode
The EWM module treats the stop and wait modes as the same. EWM functionality
remains the same in both of these modes.
22.1.2.3 Debug Mode
Entry to debug mode has no effect on the EWM.
• If the EWM is enabled prior to entry of debug mode, it remains enabled.
• If the EWM is disabled prior to entry of debug mode, it remains disabled.
22.1.3 Block Diagram
This figure shows the EWM block diagram.
Clock Gating
Cell
EWM_out
EWM Out
Logic
EWM_out
OR
Low Power
Clock
Enable
Counter Overflow
CPU Reset
Reset to Counter
EWM refresh
EWM enable
Counter >Compare High
Counter < Compare Low
AND
((EWM_in ^ assert_in) ||
~EWM_in_enable)
Compare High > Counter > Compare Low
1
1
Figure 22-1. EWM Block Diagram
Chapter 22 External Watchdog Monitor (EWM)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 399