Information

Table 28-38. Read 1s Section Command Error Handling
Error Condition Error Bit
Command not available in current mode/security FSTAT[ACCERR]
An invalid margin code is supplied FSTAT[ACCERR]
An invalid flash address is supplied FSTAT[ACCERR]
Flash address is not longword aligned FSTAT[ACCERR]
The requested section crosses a Flash block boundary FSTAT[ACCERR]
The requested number of longwords is zero FSTAT[ACCERR]
Read-1s fails FSTAT[MGSTAT0]
28.4.11.3 Program Check Command
The Program Check command tests a previously programmed program flash or data flash
longword to see if it reads correctly at the specified margin level.
Table 28-39. Program Check Command FCCOB Requirements
FCCOB Number FCCOB Contents [7:0]
0 0x02 (PGMCHK)
1 Flash address [23:16]
2 Flash address [15:8]
3 Flash address [7:0]
1
4 Margin Choice
8 Byte 0 expected data
9 Byte 1 expected data
A Byte 2 expected data
B Byte 3 expected data
1. Must be longword aligned (Flash address [1:0] = 00).
Upon clearing CCIF to launch the Program Check command, the flash memory module
sets the read margin for 1s according to Table 28-40, reads the specified longword, and
compares the actual read data to the expected data provided by the FCCOB. If the
comparison at margin-1 fails, the MGSTAT0 bit is set.
The flash memory module then sets the read margin for 0s, re-reads, and compares again.
If the comparison at margin-0 fails, the MGSTAT0 bit is set. The CCIF flag is set after
the Program Check operation completes.
The supplied address must be longword aligned (the lowest two bits of the byte address
must be 00):
• Byte 0 data is expected at the supplied address ('start'),
Chapter 28 Flash Memory Module (FTFL)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 537