Information

If continuous conversions are enabled, a new conversion is automatically initiated after
the completion of the current conversion. In software triggered operation (ADTRG=0),
continuous conversions begin after SC1A register is written and continue until aborted. In
hardware triggered operation (ADTRG=1 and one ADHWTSn event has occurred),
continuous conversions begin after a hardware trigger event and continue until aborted.
If hardware averaging is enabled, a new conversion is automatically initiated after the
completion of the current conversion until the correct number of conversions is
completed. In software triggered operation, conversions begin after SC1A register is
written. In hardware triggered operation, conversions begin after a hardware trigger. If
continuous conversions are also enabled, a new set of conversions to be averaged are
initiated following the last of the selected number of conversions.
31.4.4.2 Completing conversions
A conversion is completed when the result of the conversion is transferred into the data
result registers, Rn. If the compare functions are disabled, this is indicated by the setting
of the COCO bit in the respective SC1n register. If hardware averaging is enabled, the
respective COCO bit sets only if the last of the selected number of conversions is
completed. If the compare function is enabled, the respective COCO bit sets and
conversion result data is transferred only if the compare condition is true. If both
hardware averaging and compare functions are enabled then the respective COCO bit sets
only if the last of the selected number of conversions is completed and the compare
condition is true. An interrupt is generated if the respective AIEN bit is high at the time
that the respective COCO bit is set.
31.4.4.3 Aborting conversions
Any conversion in progress is aborted when:
• Writing to SC1A register while it is actively controlling a conversion, aborts the
current conversion. In software trigger mode (ADTRG=0), a write to SC1A register
initiates a new conversion (if the ADCH field in SC1A is equal to a value other than
all 1s). Writing to any of the SC1(B-n) registers while that specific SC1(B-n) register
is actively controlling a conversion aborts the current conversion.The SC1(B-n)
registers are not used for software trigger operation and therefore writes to the
SC1(B-n) registers do not initiate a new conversion.
• A write to any ADC register besides the SC1A:SC1n registers occurs. This indicates
a mode of operation change has occurred and the current conversion is therefore
invalid.
Chapter 31 Analog-to-Digital Converter (ADC)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 611