Information
VRSEL
VOSEL[5:0]
MUX
64-level
PSEL[2:0]
DAC
MUXMUX
IRQ
ANMUX
MSEL[2:0]
CMP
CMP
MUX
DAC output
DACEN
V
in1
V
in2
Window
and filter
control
CMPO
Reference Input 0
Reference Input 1
Reference Input 2
Reference Input 3
Reference Input 4
Reference Input 5
Reference Input 6
INP
INM
Sample input
Figure 32-1. CMP, DAC and ANMUX block diagram
32.6 CMP block diagram
The following figure shows the block diagram for the CMP module.
CMP block diagram
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
636 Freescale Semiconductor, Inc.
