Information

Table 3-4. Interrupt vector assignments (continued)
Address Vector IRQ
1
NVIC
non-IPR
register
number
2
NVIC
IPR
register
number
3
Source module Source description
0x0000_00BC 47 31 0 7 PIT Channel 1
0x0000_00C0 48 32 1 8 PIT Channel 2
0x0000_00C4 49 33 1 8 PIT Channel 3
0x0000_00C8 50 34 1 8 PDB —
0x0000_00CC 51 35 1 8 USB OTG —
0x0000_00D0 52 36 1 9 USB Charger
Detect
—
0x0000_00D4 53 37 1 9 TSI —
0x0000_00D8 54 38 1 9 MCG —
0x0000_00DC 55 39 1 9 Low Power Timer —
0x0000_00E0 56 40 1 10 Port control
module
Pin detect (Port A)
0x0000_00E4 57 41 1 10 Port control
module
Pin detect (Port B)
0x0000_00E8 58 42 1 10 Port control
module
Pin detect (Port C)
0x0000_00EC 59 43 1 10 Port control
module
Pin detect (Port D)
0x0000_00F0 60 44 1 11 Port control
module
Pin detect (Port E)
0x0000_00F4 61 45 1 11 Software initiated
interrupt
4
—
1. Indicates the NVIC's interrupt source number.
2. Indicates the NVIC's ISER, ICER, ISPR, ICPR, and IABR register number used for this IRQ. The equation to calculate this
value is: IRQ div 32
3. Indicates the NVIC's IPR register number used for this IRQ. The equation to calculate this value is: IRQ div 4
4. This interrupt can only be pended or cleared via the NVIC registers.
3.2.2.3.1 Determining the bitfield and register location for configuring a
particular interrupt
Suppose you need to configure the low-power timer (LPTMR) interrupt. The following
table is an excerpt of the LPTMR row from Interrupt channel assignments.
Chapter 3 Chip Configuration
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 65