Information

PDBx_SC field descriptions (continued)
Field Description
Selects the trigger input source for the PDB. The trigger input source can be internal or external (EXTRG
pin), or the software trigger. Please refer to Chip Configuration chapter for the actual PDB input trigger
connections.
0000 Trigger-In 0 is selected
0001 Trigger-In 1 is selected
0010 Trigger-In 2 is selected
0011 Trigger-In 3 is selected
0100 Trigger-In 4 is selected
0101 Trigger-In 5 is selected
0110 Trigger-In 6 is selected
0111 Trigger-In 7 is selected
1000 Trigger-In 8 is selected
1001 Trigger-In 9 is selected
1010 Trigger-In 10 is selected
1011 Trigger-In 11 is selected
1100 Trigger-In 12 is selected
1101 Trigger-In 13 is selected
1110 Trigger-In 14 is selected
1111 Software trigger is selected
7
PDBEN
PDB Enable
0 PDB disabled. Counter is off.
1 PDB enabled
6
PDBIF
PDB Interrupt Flag
This bit is set when the counter value is equal to the IDLY register. Writing zero clears this bit.
5
PDBIE
PDB Interrupt Enable.
This bit enables the PDB interrupt. When this bit is set and DMAEN is cleared, PDBIF generates a PDB
interrupt.
0 PDB interrupt disabled
1 PDB interrupt enabled
4
Reserved
This read-only field is reserved and always has the value zero.
3–2
MULT
Multiplication Factor Select for Prescaler
This bit selects the multiplication factor of the prescaler divider for the counter clock.
00 Multiplication factor is 1
01 Multiplication factor is 10
10 Multiplication factor is 20
11 Multiplication factor is 40
1
CONT
Continuous Mode Enable
This bit enables the PDB operation in Continuous mode.
Table continues on the next page...
Memory Map and Register Definition
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
676 Freescale Semiconductor, Inc.