Information

ManualsBrandsNXP SEMICONDUCTORS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 64 (10x10) 32-Bit 50 MHz I/O number 40

FTMx_EXTTRIG field descriptions (continued)

Field Description

Set by hardware when a channel trigger is generated. Clear TRIGF by reading EXTTRIG while TRIGF is

set and then writing a 0 to TRIGF. Writing a 1 to TRIGF has no effect.

If another channel trigger is generated before the clearing sequence is completed, the sequence is reset

so TRIGF remains set after the clear sequence is completed for the earlier TRIGF.

0 No channel trigger was generated.

1 A channel trigger was generated.

6

INITTRIGEN

Initialization Trigger Enable

Enables the generation of the trigger when the FTM counter is equal to the CNTIN register.

0 The generation of initialization trigger is disabled.

1 The generation of initialization trigger is enabled.

5

CH1TRIG

Channel 1 Trigger Enable

Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.

0 The generation of the channel trigger is disabled.

1 The generation of the channel trigger is enabled.

4

CH0TRIG

Channel 0 Trigger Enable

Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.

0 The generation of the channel trigger is disabled.

1 The generation of the channel trigger is enabled.

3

CH5TRIG

Channel 5 Trigger Enable

Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.

0 The generation of the channel trigger is disabled.

1 The generation of the channel trigger is enabled.

2

CH4TRIG

Channel 4 Trigger Enable

Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.

0 The generation of the channel trigger is disabled.

1 The generation of the channel trigger is enabled.

1

CH3TRIG

Channel 3 Trigger Enable

Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.

0 The generation of the channel trigger is disabled.

1 The generation of the channel trigger is enabled.

0

CH2TRIG

Channel 2 Trigger Enable

Enable the generation of the channel trigger when the FTM counter is equal to the CnV register.

0 The generation of the channel trigger is disabled.

1 The generation of the channel trigger is enabled.

Chapter 35 FlexTimer Module (FTM)

K20 Sub-Family Reference Manual, Rev. 2, Feb 2012

Freescale Semiconductor, Inc. 721