Information
Table 3-18. DMA request sources - MUX 0 (continued)
Source
number
Source module Source description
8 Reserved —
9 Reserved —
10 Reserved —
11 Reserved —
12 Reserved —
13 Reserved —
14 I
2
S0 Receive
15 I
2
S0 Transmit
16 SPI0 Receive
17 SPI0 Transmit
18 Reserved —
19 Reserved —
20 Reserved —
21 Reserved —
22 I
2
C0 —
23 Reserved —
24 FTM0 Channel 0
25 FTM0 Channel 1
26 FTM0 Channel 2
27 FTM0 Channel 3
28 FTM0 Channel 4
29 FTM0 Channel 5
30 FTM0 Channel 6
31 FTM0 Channel 7
32 FTM1 Channel 0
33 FTM1 Channel 1
34 Reserved —
35 Reserved —
36 Reserved —
37 Reserved —
38 Reserved —
39 Reserved —
40 ADC0 —
41 Reserved —
Table continues on the next page...
Chapter 3 Chip Configuration
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 77