Information

DMA Controller
Crossbar switch
Requests
Peripheral
bridge 0
Register
access
Transfers
DMA Multiplexer
Figure 3-13. DMA Controller configuration
Table 3-19. Reference links to related information
Topic Related module Reference
Full description DMA Controller DMA Controller
System memory map System memory map
Register access Peripheral bridge
(AIPS-Lite 0)
AIPS-Lite 0
Clocking Clock distribution
Power management Power management
Transfers Crossbar switch Crossbar switch
3.3.10 External Watchdog Monitor (EWM) Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Chapter 3 Chip Configuration
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 79