Information

phase A
phase B
FTM counter
increment/decrement
FTM counter
MOD
CNTIN
0x0000
Time
+1
+1
+1
+1
+1
+1
+1
+1
-1
-1
-1
-1
-1
-1
-1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
-1
-1
-1
-1
-1
-1
-1
Figure 35-211. Quadrature Decoder – Phase A and Phase B Encoding mode
The following figure shows the FTM counter overflow in up counting. In this case, when
the FTM counter changes from MOD to CNTIN, TOF and TOFDIR bits are set. TOF bit
indicates the FTM counter overflow occurred. TOFDIR indicates the counting was up
when the FTM counter overflow occurred.
phase A
phase B
FTM counter
increment/decrement
FTM counter
MOD
CNTIN
0x0000
Time
+1
+1
+1
+1
+1
+1
+1
set TOF
set TOFDIR
set TOF
set TOFDIR
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
Figure 35-212. FTM Counter overflow in up counting for Quadrature Decoder mode
The following figure shows the FTM counter overflow in down counting. In this case,
when the FTM counter changes from CNTIN to MOD, TOF bit is set and TOFDIR bit is
cleared. TOF bit indicates the FTM counter overflow occurred. TOFDIR indicates the
counting was down when the FTM counter overflow occurred.
Functional description
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
810 Freescale Semiconductor, Inc.