Information

Register
access
Peripheral
bridge
Multipurpose Clock
Generator (MCG)
RTC
oscillator
System
oscillator
System integration
module (SIM)
Figure 3-16. MCG configuration
Table 3-26. Reference links to related information
Topic Related module Reference
Full description MCG MCG
System memory map System memory map
Clocking Clock distribution
Power management Power management
Signal multiplexing Port control Signal multiplexing
3.4.2 OSC Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Signal multiplexing
Register
access
Peripheral
bridge
System oscillator
MCG
Module signals
Figure 3-17. OSC configuration
Table 3-27. Reference links to related information
Topic Related module Reference
Full description OSC OSC
System memory map System memory map
Clocking Clock distribution
Table continues on the next page...
Chapter 3 Chip Configuration
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 83