Information

USB memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4007_2088 Error Interrupt Status Register (USB0_ERRSTAT) 8 R/W 00h
40.4.11/
903
4007_208C Error Interrupt Enable Register (USB0_ERREN) 8 R/W 00h
40.4.12/
904
4007_2090 Status Register (USB0_STAT) 8 R 00h
40.4.13/
906
4007_2094 Control Register (USB0_CTL) 8 R/W 00h
40.4.14/
907
4007_2098 Address Register (USB0_ADDR) 8 R/W 00h
40.4.15/
908
4007_209C BDT Page Register 1 (USB0_BDTPAGE1) 8 R/W 00h
40.4.16/
909
4007_20A0 Frame Number Register Low (USB0_FRMNUML) 8 R/W 00h
40.4.17/
909
4007_20A4 Frame Number Register High (USB0_FRMNUMH) 8 R/W 00h
40.4.18/
910
4007_20A8 Token Register (USB0_TOKEN) 8 R/W 00h
40.4.19/
910
4007_20AC SOF Threshold Register (USB0_SOFTHLD) 8 R/W 00h
40.4.20/
911
4007_20B0 BDT Page Register 2 (USB0_BDTPAGE2) 8 R/W 00h
40.4.21/
912
4007_20B4 BDT Page Register 3 (USB0_BDTPAGE3) 8 R/W 00h
40.4.22/
912
4007_20C0 Endpoint Control Register (USB0_ENDPT0) 8 R/W 00h
40.4.23/
912
4007_20C4 Endpoint Control Register (USB0_ENDPT1) 8 R/W 00h
40.4.23/
912
4007_20C8 Endpoint Control Register (USB0_ENDPT2) 8 R/W 00h
40.4.23/
912
4007_20CC Endpoint Control Register (USB0_ENDPT3) 8 R/W 00h
40.4.23/
912
4007_20D0 Endpoint Control Register (USB0_ENDPT4) 8 R/W 00h
40.4.23/
912
4007_20D4 Endpoint Control Register (USB0_ENDPT5) 8 R/W 00h
40.4.23/
912
4007_20D8 Endpoint Control Register (USB0_ENDPT6) 8 R/W 00h
40.4.23/
912
4007_20DC Endpoint Control Register (USB0_ENDPT7) 8 R/W 00h
40.4.23/
912
Table continues on the next page...
Memory map/Register definitions
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
894 Freescale Semiconductor, Inc.