Information

40.4.4 Peripheral Additional Info register (USBx_ADDINFO)
Reads back the value of the fixed Interrupt Request Level (IRQNUM) along with the
Host Enable bit.
Addresses: USB0_ADDINFO is 4007_2000h base + Ch offset = 4007_200Ch
Bit 7 6 5 4 3 2 1 0
Read IRQNUM 0 IEHOST
Write
Reset
0 0 0 0 0 0 0 1
USBx_ADDINFO field descriptions
Field Description
7–3
IRQNUM
Assigned Interrupt Request Number
2–1
Reserved
This read-only field is reserved and always has the value zero.
0
IEHOST
When this bit is set, the USB peripheral is operating in host mode.
40.4.5 OTG Interrupt Status register (USBx_OTGISTAT)
Records changes of the ID sense and VBUS signals. Software can read this register to
determine the event that triggers interrupt. Only bits that have changed since the last
software read are set. Writing a one to a bit clears the associated interrupt.
Addresses: USB0_OTGISTAT is 4007_2000h base + 10h offset = 4007_2010h
Bit 7 6 5 4 3 2 1 0
Read
IDCHG ONEMSEC
LINE_
STATE_
CHG
0
SESSVLDCHG B_SESS_CHG
0
AVBUSCHG
Write
Reset
0 0 0 0 0 0 0 0
USBx_OTGISTAT field descriptions
Field Description
7
IDCHG
This bit is set when a change in the ID Signal from the USB connector is sensed.
6
ONEMSEC
This bit is set when the 1 millisecond timer expires. This bit stays asserted until cleared by software. The
interrupt must be serviced every millisecond to avoid losing 1msec counts.
5
LINE_STATE_
CHG
This bit is set when the USB line state changes. The interrupt associated with this bit can be used to
detect Reset, Resume, Connect, and Data Line Pulse signaling
Table continues on the next page...
Chapter 40 Universal Serial Bus OTG Controller (USBOTG)
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 897