Information

USBx_OTGISTAT field descriptions (continued)
Field Description
4
Reserved
This read-only field is reserved and always has the value zero.
3
SESSVLDCHG
This bit is set when a change in VBUS is detected indicating a session valid or a session no longer valid.
2
B_SESS_CHG
This bit is set when a change in VBUS is detected on a B device.
1
Reserved
This read-only field is reserved and always has the value zero.
0
AVBUSCHG
This bit is set when a change in VBUS is detected on an A device.
40.4.6 OTG Interrupt Control Register (USBx_OTGICR)
Enables the corresponding interrupt status bits defined in the OTG Interrupt Status
Register.
Addresses: USB0_OTGICR is 4007_2000h base + 14h offset = 4007_2014h
Bit 7 6 5 4 3 2 1 0
Read
IDEN
ONEMSECEN LINESTATEEN
0
SESSVLDEN
BSESSEN
0
AVBUSEN
Write
Reset
0 0 0 0 0 0 0 0
USBx_OTGICR field descriptions
Field Description
7
IDEN
ID Interrupt Enable
0 The ID interrupt is disabled
1 The ID interrupt is enabled
6
ONEMSECEN
One Millisecond Interrupt Enable
0 Diables the 1ms timer interrupt.
1 Enables the 1ms timer interrupt.
5
LINESTATEEN
Line State Change Interrupt Enable
0 Disables the LINE_STAT_CHG interrupt.
1 Enables the LINE_STAT_CHG interrupt.
4
Reserved
This read-only field is reserved and always has the value zero.
3
SESSVLDEN
Session Valid Interrupt Enable
0 Disables the SESSVLDCHG interrupt.
1 Enables the SESSVLDCHG interrupt.
Table continues on the next page...
Memory map/Register definitions
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
898 Freescale Semiconductor, Inc.