Information

Section Number Title Page
10.2.4 Signal multiplexing constraints....................................................................................................................193
10.3 Pinout............................................................................................................................................................................193
10.3.1 K20 Signal Multiplexing and Pin Assignments...........................................................................................193
10.3.2 K20 Pinouts..................................................................................................................................................196
10.4 Module Signal Description Tables................................................................................................................................198
10.4.1 Core Modules...............................................................................................................................................198
10.4.2 System Modules...........................................................................................................................................199
10.4.3 Clock Modules.............................................................................................................................................199
10.4.4 Memories and Memory Interfaces...............................................................................................................200
10.4.5 Analog..........................................................................................................................................................200
10.4.6 Communication Interfaces...........................................................................................................................201
10.4.7 Human-Machine Interfaces (HMI)..............................................................................................................203
Chapter 11
Port control and interrupts (PORT)
11.1 Introduction...................................................................................................................................................................205
11.1.1 Overview......................................................................................................................................................205
11.1.2 Features........................................................................................................................................................205
11.1.3 Modes of operation......................................................................................................................................206
11.2 External signal description............................................................................................................................................206
11.3 Detailed signal description............................................................................................................................................207
11.4 Memory map and register definition.............................................................................................................................207
11.4.1 Pin Control Register n (PORTx_PCRn).......................................................................................................213
11.4.2 Global Pin Control Low Register (PORTx_GPCLR)..................................................................................216
11.4.3 Global Pin Control High Register (PORTx_GPCHR).................................................................................216
11.4.4 Interrupt Status Flag Register (PORTx_ISFR)............................................................................................217
11.5 Functional description...................................................................................................................................................218
11.5.1 Pin control....................................................................................................................................................218
11.5.2 Global pin control........................................................................................................................................218
11.5.3 External interrupts........................................................................................................................................219
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
Freescale Semiconductor, Inc. 9