Information

USBx_OTGSTAT field descriptions (continued)
Field Description
3
SESS_VLD
Session Valid
0 The VBUS voltage is below the B session valid threshold
1 The VBUS voltage is above the B session valid threshold.
2
BSESSEND
B Session End
0 The VBUS voltage is above the B session end threshold.
1 The VBUS voltage is below the B session end threshold.
1
Reserved
This read-only field is reserved and always has the value zero.
0
AVBUSVLD
A VBUS Valid
0 The VBUS voltage is below the A VBUS Valid threshold.
1 The VBUS voltage is above the A VBUS Valid threshold.
40.4.8 OTG Control Register (USBx_OTGCTL)
The OTG Control Register controls the operation of VBUS and Data Line termination
resistors.
Addresses: USB0_OTGCTL is 4007_2000h base + 1Ch offset = 4007_201Ch
Bit 7 6 5 4 3 2 1 0
Read
DPHIGH
0
DPLOW DMLOW
0
OTGEN
0
Write
Reset
0 0 0 0 0 0 0 0
USBx_OTGCTL field descriptions
Field Description
7
DPHIGH
D+ Data Line pullup resistor enable
0 D+ pullup resistor is not enabled
1 D+ pullup resistor is enabled
6
Reserved
This read-only field is reserved and always has the value zero.
5
DPLOW
D+ Data Line pull-down resistor enable
This bit should always be enabled together with bit 4 (DMLOW)
0 D+ pulldown resistor is not enabled.
1 D+ pulldown resistor is enabled.
4
DMLOW
D- Data Line pull-down resistor enable
Table continues on the next page...
Memory map/Register definitions
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
900 Freescale Semiconductor, Inc.