Information

2. Disable the USB controller to prevent transitions on the USB D+ or D– lines from
causing spurious interrupt or wakeup events to the system.
3. Set CONTROL[IACK] to acknowledge the interrupt.
4. Set CONTROL[SR] to issue a software reset to the module.
5. Disable the module.
6. Communicate the appropriate charge rate to the external battery charger IC; see
Table 41-13.
41.5.1.5.2 Charging host port
For a charging host port, the module does the following:
• Updates the STATUS register to reflect that a charging host port has been detected
with SEQ_RES = 10. See Table 41-18 for field values.
• Sets CONTROL[IF].
• Generates an interrupt if enabled in CONTROL[IE].
At this point, control has been passed to system software via the interrupt. Software
should:
1. Read the STATUS register.
2. Set CONTROL[IACK] to acknowledge the interrupt.
3. Set CONTROL[SR] to issue a software reset to the module.
4. Disable the module.
5. Communicate the appropriate charge rate to the external battery charger IC; see
Table 41-13.
41.5.1.6 Charger detection sequence timeout
The maximum time allowed to connect according to the USB Battery Charging
Specification, v1.1 is one second. If the Unit Connection Timer reaches the one second
limit and the sequence is still running as indicated by the STATUS[ACTIVE] bit, the
module does the following:
Functional description
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
946 Freescale Semiconductor, Inc.