Information

various bits that help with queue management and transfer protocol . See ../dil/
DSPI_BG_V5x.xml#PUSHR_MASTER for details on the SPI command fields. The data
in the executing TX FIFO entry is loaded into the shift register and shifted out on the
Serial Out (SOUT) pin. In SPI Master mode, each SPI frame to be transmitted has a
command associated with it, allowing for transfer attribute control on a frame by frame
basis.
43.4.2.2 Slave mode
In SPI Slave mode the DSPI responds to transfers initiated by an SPI bus master. The
DSPI does not initiate transfers. Certain transfer attributes such as clock polarity, clock
phase, and frame size must be set for successful communication with an SPI master. The
SPI Slave mode transfer attributes are set in the CTAR0 . The data is shifted out with
MSB first. Shifting out of LSB is not supported in this mode.
43.4.2.3 FIFO disable operation
The FIFO disable mechanisms allow SPI transfers without using the TX FIFO or RX
FIFO. The DSPI operates as a double-buffered simplified SPI when the FIFOs are
disabled. The Transmit and Receive side of the FIFOs are disabled separately; setting the
MCR[DIS_TXF] bit disables the TX FIFO, and setting the MCR[DIS_RXF] bit disables
the RX FIFO.
The FIFO disable mechanisms are transparent to the user and to host software. Transmit
data and commands are written to the PUSHR and received data is read from the POPR.
When the TX FIFO is disabled, the fields SR[TFFF], SR[TFUF] and SR[TXCTR] behave
as if there is a one-entry FIFO but the contents of TXFRs, SR[TXNXTPTR] are
undefined. Similarly, when the RX FIFO is disabled, the RFDF, RFOF, and RXCTR
fields in the SR behave as if there is a one-entry FIFO, but the contents of the RXFR
registers and POPNXTPTR are undefined.
43.4.2.4 Transmit First In First Out (TX FIFO) buffering mechanism
The TX FIFO functions as a buffer of SPI data for transmission. The TX FIFO holds 4
words, each consisting of SPI data. The number of entries in the TX FIFO is device-
specific. SPI data is added to the TX FIFO by writing to the Data Field of DSPI PUSH
FIFO Register (PUSHR). TX FIFO entries can only be removed from the TX FIFO by
being shifted out or by flushing the TX FIFO.
Functional description
K20 Sub-Family Reference Manual, Rev. 2, Feb 2012
986 Freescale Semiconductor, Inc.