Information

Table 5. Power mode transition operating behaviors
Symbol Description Min. Max. Unit Notes
t
POR
After a POR event, amount of time from the point V
DD
reaches 1.71 V to execution of the first instruction
across the operating temperature range of the chip.
— 300 μs 1
• VLLS0 → RUN
— 130 μs
• VLLS1 → RUN
— 130 μs
• VLLS2 → RUN
— 70 μs
• VLLS3 → RUN
— 70 μs
• LLS → RUN
— 6 μs
• VLPS → RUN
— 5.2 μs
• STOP → RUN
— 5.2 μs
1. Normal boot (FTFL_OPT[LPBOOT]=1)
5.2.5 Power consumption operating behaviors
Table 6. Power consumption operating behaviors
Symbol Description Min. Typ. Max. Unit Notes
I
DDA
Analog supply current — — See note mA 1
I
DD_RUN
Run mode current — all peripheral clocks
disabled, code executing from flash
• @ 1.8V
• @ 3.0V
—
—
13.7
13.9
15.1
15.3
mA
mA
2
I
DD_RUN
Run mode current — all peripheral clocks
enabled, code executing from flash
• @ 1.8V
• @ 3.0V
• @ 25°C
• @ 125°C
—
—
—
16.1
16.3
16.7
18.2
17.7
18.4
mA
mA
mA
3, 4
I
DD_WAIT
Wait mode high frequency current at 3.0 V — all
peripheral clocks disabled
— 7.5 8.4 mA 2
I
DD_WAIT
Wait mode reduced frequency current at 3.0 V
— all peripheral clocks disabled
— 5.6 6.4 mA 5
Table continues on the next page...
General
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
14 Freescale Semiconductor, Inc.