Information

Table 10. General switching specifications (continued)
Symbol Description Min. Max. Unit Notes
Port rise and fall time (low drive strength)
Slew disabled
1.71 ≤ V
DD
≤ 2.7V
2.7 ≤ V
DD
≤ 3.6V
Slew enabled
1.71 ≤ V
DD
≤ 2.7V
2.7 ≤ V
DD
≤ 3.6V
12
6
36
24
ns
ns
ns
ns
5
1. This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In Stop, VLPS, LLS, and VLLSx modes, the synchronizer is bypassed so shorter pulses can be
recognized in that case.
2. The greater synchronous and asynchronous timing must be met.
3. This is the minimum pulse width that is guaranteed to be recognized as a pin interrupt request in Stop, VLPS, LLS, and
VLLSx modes.
4. 75pF load
5. 15pF load
5.4 Thermal specifications
5.4.1 Thermal operating requirements
Table 11. Thermal operating requirements
Symbol Description Min. Max. Unit
T
J
Die junction temperature –40 125 °C
T
A
Ambient temperature –40 105 °C
5.4.2 Thermal attributes
Board type Symbol Description 64 MAPBGA 64 LQFP Unit Notes
Single-layer
(1s)
R
θJA
Thermal
resistance,
junction to
ambient (natural
convection)
107 65 °C/W 1, 2
Four-layer
(2s2p)
R
θJA
Thermal
resistance,
junction to
ambient (natural
convection)
56 46 °C/W 1, 3
Table continues on the next page...
General
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
Freescale Semiconductor, Inc. 21