Information

121
MAP
BGA
100
LQFP
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7 EzPort
D3 94 PTD1 ADC0_SE5b ADC0_SE5b PTD1 SPI0_SCK UART2_CTS_
b
FB_CS0_b
C3 95 PTD2/
LLWU_P13
DISABLED PTD2/
LLWU_P13
SPI0_SOUT UART2_RX FB_AD4
B3 96 PTD3 DISABLED PTD3 SPI0_SIN UART2_TX FB_AD3
A3 97 PTD4/
LLWU_P14
DISABLED PTD4/
LLWU_P14
SPI0_PCS1 UART0_RTS_
b
FTM0_CH4 FB_AD2 EWM_IN
A2 98 PTD5 ADC0_SE6b ADC0_SE6b PTD5 SPI0_PCS2 UART0_CTS_
b/
UART0_COL_
b
FTM0_CH5 FB_AD1 EWM_OUT_b
B2 99 PTD6/
LLWU_P15
ADC0_SE7b ADC0_SE7b PTD6/
LLWU_P15
SPI0_PCS3 UART0_RX FTM0_CH6 FB_AD0 FTM0_FLT0
A1 100 PTD7 DISABLED PTD7 CMT_IRO UART0_TX FTM0_CH7 FTM0_FLT1
A11 — NC NC NC
B11 — NC NC NC
C11 — NC NC NC
K3 — NC NC NC
H4 — NC NC NC
J3 — NC NC NC
H3 — NC NC NC
K4 — NC NC NC
J9 — NC NC NC
J4 — NC NC NC
H11 — NC NC NC
A10 — NC NC NC
A9 — NC NC NC
B1 — NC NC NC
C2 — NC NC NC
C1 — NC NC NC
D2 — NC NC NC
D1 — NC NC NC
E1 — NC NC NC
8.2 K20 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
Pinout
K20 Sub-Family Data Sheet, Rev. 3, 11/2012.
Freescale Semiconductor, Inc. 69