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45.4.1 Transmit process

To transmit a CAN frame, the CPU must prepare a Message Buffer for transmission by

executing the following procedure:

1. Check whether the respective interrupt bit is set and clear it.

2. If the MB is active (transmission pending), write the ABORT code (0b1001) to the

CODE field of the Control and Status word to request an abortion of the

transmission. Wait for the corresponding IFLAG to be asserted by polling the IFLAG

back the CODE field to check if the transmission was aborted or transmitted (see

Transmission abort mechanism). If backwards compatibility is desired (MCR[AEN]

bit is negated), just write the INACTIVE code (0b1000) to the CODE field to

inactivate the MB but then the pending frame may be transmitted without notification

(see Mailbox inactivation).

3. Write the ID word.

4. Write the data bytes.

5. Write the DLC, Control, and CODE fields of the Control and Status word to activate

the MB.

When the MB is activated, it will participate into the arbitration process and eventually

be transmitted according to its priority. At the end of the successful transmission, the

value of the Free Running Timer is written into the Time Stamp field, the CODE field in

the Control and Status word is updated, the CRC Register is updated, a status flag is set

in the Interrupt Flag Register and an interrupt is generated if allowed by the

corresponding Interrupt Mask Register bit. The new CODE field after transmission

depends on the code that was used to activate the MB (see Table 45-70 and Table 45-71

in Message buffer structure).

When the Abort feature is enabled (MCR[AEN] is asserted), after the Interrupt Flag is

asserted for a Mailbox configured as transmit buffer, the Mailbox is blocked, therefore

the CPU is not able to update it until the Interrupt Flag is negated by CPU. This means

that the CPU must clear the corresponding IFLAG before starting to prepare this MB for

a new transmission or reception.

Chapter 45 CAN (FlexCAN)

K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012

Freescale Semiconductor, Inc.

Preliminary

1149

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