Information

SPIx_RXFRn field descriptions
Field Description
31–0
RXDATA
Receive Data
Contains the received SPI data.
46.4 Functional description
The Serial Peripheral Interface (DSPI) block supports full-duplex, synchronous serial
communications between MCUs and peripheral devices. The SPI configuration transfers
data serially using a shift register and a selection of programmable transfer attributes.
The DCONF field in the Module Configuration Register (MCR) determines the module
Configuration. SPI configuration is selected when DCONF within SPIx_MCR is 0b00.
The CTARn registers hold clock and transfer attributes. The SPI configuration allows to
select which CTAR to use on a frame by frame basis by setting a field in the SPI
command.
See DSPI Clock and Transfer Attributes Register (In Master Mode) (SPI_CTARn) for
information on the fields of CTAR registers.
Typical master to slave connections are shown in the following figure. When a data
transfer operation is performed, data is serially shifted a predetermined number of bit
positions. Because the modules are linked, data is exchanged between the master and the
slave. The data that was in the master shift register is now in the shift register of the
slave, and vice versa. At the end of a transfer, the TCF bit in the SR is set to indicate a
completed transfer.
Shift Register
Baud Rate
Generator
Shift Register
SOUT
SCK
PCSx
DSPI Slave
DSPI Master
SIN
SOUT
SIN
SS
SCK
Figure 46-69. SPI serial protocol overview
Chapter 46 Serial Peripheral Interface (SPI)
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
1209
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