Information

• FTM0 hardware trigger 0 = CMP0 Output or FTM1 Match (when enabled in the
FTM1 External Trigger (EXTTRIG) register)
• FTM0 hardware trigger 1 = PDB channel 1 Trigger Output or FTM2 Match (when
enabled in the FTM2 External Trigger (EXTTRIG) register)
• FTM0 hardware trigger 2 = FTM0_FLT0 pin
• FTM1 hardware trigger 0 = CMP0 Output
• FTM1 hardware trigger 1 = CMP1 Output
• FTM1 hardware trigger 2 = FTM1_FLT0 pin
• FTM2 hardware trigger 0 = CMP0 Output
• FTM2 hardware trigger 1 = CMP2 Output
• FTM2 hardware trigger 2 = FTM2_FLT0 pin
For the triggers with more than one option, the SOPT4 register in the SIM module
controls the selection.
3.8.2.7 Input capture options for FTM module instances
The following channel 0 input capture source options are selected via the SOPT4 register
in the SIM module. The external pin option is selected by default.
• FTM1 channel 0 input capture = FTM1_CH0 pin or CMP0 output or CMP1 output
or USB start of frame pulse
• FTM2 channel 0 input capture = FTM2_CH0 pin or CMP0 output or CMP1 output
NOTE
When the USB start of frame pulse option is selected as an
FTM channel input capture, disable the USB SOF token
interrupt in the USB Interrupt Enable register
(INTEN[SOFTOKEN]) to avoid USB enumeration conflicts.
3.8.2.8 FTM output triggers for other modules
FTM output triggers can be selected as input triggers for the PDB and ADC modules. See
PDB Instantiation and ADC triggers.
3.8.2.9 FTM Global Time Base
This chip provides the optional FTM global time base feature (see Global time base
(GTB)).
Chapter 3 Chip Configuration
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
121
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