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Depending on the state of the ROOE bit in the MCR, the data from the transfer that
generated the overflow is either ignored or shifted in to the shift register. If the ROOE bit
is set, the incoming data is shifted in to the shift register. If the ROOE bit is cleared, the
incoming data is ignored.
46.4.8 Power saving features
The module supports following power-saving strategies:
• External Stop mode
• Module Disable mode – Clock gating of non-memory mapped logic
46.4.8.1 Stop mode (External Stop mode)
The DSPI supports the Stop mode protocol. When a request is made to enter External
Stop mode, the DSPI block acknowledges the request . If a serial transfer is in progress,
the DSPI waits until it reaches the frame boundary before it is ready to have its clocks
shut off . While the clocks are shut off, the DSPI memory-mapped logic is not accessible.
This also puts the DSPI in STOPPED state. The SR[TXRXS] bit is cleared to indicate
STOPPED state. The states of the interrupt and DMA request signals cannot be changed
while in External Stop mode.
46.4.8.2 Module Disable mode
Module Disable mode is a block-specific mode that the module can enter to save power.
Host CPU can initiate the Module Disable mode by setting the MDIS bit in the MCR.
The Module Disable mode can also be initiated by hardware. A power management block
can initiate the Module Disable mode by asserting the DOZE mode signal while the
DOZE bit in the MCR is set.
When the MDIS bit is set or the DOZE mode signal is asserted while the DOZE bit is set,
the module negates Clock Enable signal at the next frame boundary. Once the Clock
Enable signal is negated, it is said to have entered Module Disable Mode. This also puts
the module in STOPPED state. The SR[TXRXS] bit is cleared to indicate STOPPED
state.If implemented, the Clock Enable signal can stop the clock to the non-memory
mapped logic. When Clock Enable is negated, the module is in a dormant state, but the
memory mapped registers are still accessible. Certain read or write operations have a
different effect when the module is in the Module Disable mode. Reading the RX FIFO
Pop Register does not change the state of the RX FIFO. Similarly, writing to the PUSHR
Functional description
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
1226
Preliminary
Freescale Semiconductor, Inc.
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