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10. Enable DMA channel by enabling the DMA enable request for the DMA channel
assigned to the module TX FIFO, and RX FIFO by setting the corresponding DMA
set enable request bit.
11. Enable serial transmission and serial reception of data by clearing the EOQF bit.
46.5.2 Switching Master and Slave mode
When changing modes in the module, follow the steps below to guarantee proper
operation.
1. Halt it by setting MCR[HALT].
2. Clear the transmit and receive FIFOs by writing a 1 to the CLR_TXF and CLR_RXF
bits in MCR.
3. Set the appropriate mode in MCR[MSTR] and enable it by clearing MCR[HALT].
46.5.3 Initializing Module in Master/Slave Modes
Once the appropriate mode in MCR[MSTR] is configured, the module is enabled by
clearing MCR[HALT]. It should be ensured that module Slave is enabled before enabling
it's Master. This ensures the Slave is ready to be communicated with, before Master
initializes communication.
46.5.4 Baud rate settings
The following table shows the baud rate that is generated based on the combination of the
baud rate prescaler PBR and the baud rate scaler BR in the CTARs. The values calculated
assume a 100 MHz system frequency and the double baud rate DBR bit is cleared.
NOTE
The clock frequency mentioned above is given as an example in
this chapter. See the clocking chapter for the frequency used to
drive this module in the device.
Initialization/application information
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
1228
Preliminary
Freescale Semiconductor, Inc.
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