Information

USB
Regulator
USB
XCVR
USB
Controller
USB0_DP
USB0_DM
VDD
VOUT33
VREGIN
TYPE A
D+
D-
VBUS
Cstab
To PMC and Pads
Chip
Figure 3-50. USB regulator bus supply
3.9.1.3 USB power management
The regulator should be put into STANDBY mode whenever the chip is in Stop mode.
3.9.1.4 USB controller configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Signal multiplexing
Module signals
Register
access
USB controller
Peripheral
bridge 0
Crossbar switch
Transfers
Figure 3-51. USB controller configuration
Table 3-55. Reference links to related information
Topic Related module Reference
Full description USB controller USB controller
System memory map System memory map
Table continues on the next page...
Communication interfaces
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
130
Preliminary
Freescale Semiconductor, Inc.
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