Information

UARTx_PRE field descriptions
Field Description
7–0
PREAMBLE
CEA709.1-B Preamble Register
The number of bit-sync characters that occur prior to the byte-sync character when preamble is
transmitted.
NOTE: The minimum preamble length supported by twisted pair wire is four bit-sync fields.
48.3.39 UART CEA709.1-B Transmit Packet Length (UARTx_TPL)
Address: Base address + 28h offset
Bit 7 6 5 4 3 2 1 0
Read
TPL
Write
Reset
0 0 0 0 0 0 0 0
UARTx_TPL field descriptions
Field Description
7–0
TPL
Transmit Packet Length Register
Length of the data packet in bytes that is transmitted by CEA709.1-B transmitter. This includes the CRC
packet as well.
48.3.40 UART CEA709.1-B Interrupt Enable Register (UARTx_IE)
Address: Base address + 29h offset
Bit 7 6 5 4 3 2 1 0
Read 0
WBEIE ISDIE PRXIE PTXIE PCTEIE PSIE TXFIE
Write
Reset
0 0 0 0 0 0 0 0
UARTx_IE field descriptions
Field Description
7
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
6
WBEIE
WBASE Expired Interrupt Enable
Interrupt enable for WBASE expired flag.
0 Interrupt is disabled.
1 Interrupt is enabled.
5
ISDIE
Initial Sync Detection Interrupt Enable
Interrupt enable for initial synchronization detection flag.
Table continues on the next page...
Memory map and registers
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
1314
Preliminary
Freescale Semiconductor, Inc.
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