Information

49.3.9 SAI Transmit Mask Register (I2Sx_TMR)
This register is double-buffered and updates:
1. When TCSR[TE] is first set
2. At the end of each frame.
This allows the masked words in each frame to change from frame to frame.
Address: 4002_F000h base + 60h offset = 4002_F060h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
TWM
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
I2Sx_TMR field descriptions
Field Description
31–0
TWM
Transmit Word Mask
Configures whether the transmit word is masked (transmit data pin tristated and transmit data not read
from FIFO) for the corresponding word in the frame.
0 Word N is enabled.
1 Word N is masked. The transmit data pins are tri-stated when masked.
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
1382
Preliminary
Freescale Semiconductor, Inc.
General Business Information