Information

51.6.3 Pin Enable register (TSIx_PEN)
Do not change the settings when TSIEN is 1.
Address: 4004_5000h base + 8h offset = 4004_5008h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
LPSP
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
PEN15 PEN14 PEN13 PEN12 PEN11 PEN10
PEN9 PEN8 PEN7 PEN6 PEN5 PEN4 PEN3 PEN2 PEN1 PEN0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
TSIx_PEN field descriptions
Field Description
31–20
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
19–16
LPSP
Low-Power Scan Pin
0000 TSI_IN[0] is active in low-power mode.
0001 TSI_IN[1] is active in low-power mode.
0010 TSI_IN[2] is active in low-power mode.
0011 TSI_IN[3] is active in low-power mode.
0100 TSI_IN[4] is active in low-power mode.
0101 TSI_IN[5] is active in low-power mode.
0110 TSI_IN[6] is active in low-power mode.
0111 TSI_IN[7] is active in low-power mode.
1000 TSI_IN[8] is active in low-power mode.
1001 TSI_IN[9] is active in low-power mode.
1010 TSI_IN[10] is active in low-power mode.
1011 TSI_IN[11] is active in low-power mode.
1100 TSI_IN[12] is active in low-power mode.
1101 TSI_IN[13] is active in low-power mode.
1110 TSI_IN[14] is active in low-power mode.
1111 TSI_IN[15] is active in low-power mode.
15
PEN15
Touch Sensing Input Pin Enable Register 15
0 The corresponding pin is not used by TSI.
1 The corresponding pin is used by TSI.
14
PEN14
Touch Sensing Input Pin Enable Register 14
Table continues on the next page...
Memory map and register definition
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
1424
Preliminary
Freescale Semiconductor, Inc.
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