Information

Table 4-3. Peripheral bridge 1 slot assignments (continued)
System 32-bit base address Slot
number
Module
0x400E_8000 104 —
0x400E_9000 105 —
0x400E_A000 106 UART 4
0x400E_B000 107 —
0x400E_C000 108 —
0x400E_D000 109 —
0x400E_E000 110 —
0x400E_F000 111 —
0x400F_0000 112 —
0x400F_1000 113 —
0x400F_2000 114 —
0x400F_3000 115 —
0x400F_4000 116 —
0x400F_5000 117 —
0x400F_6000 118 —
0x400F_7000 119 —
0x400F_8000 120 —
0x400F_9000 121 —
0x400F_A000 122 —
0x400F_B000 123 —
0x400F_C000 124 —
0x400F_D000 125 —
0x400F_E000 126 —
0x400F_F000 Not an AIPS-Lite slot. The 32-bit general purpose input/output module that shares the
crossbar switch slave port with the AIPS-Lite is accessed at this address.
4.6 Private Peripheral Bus (PPB) memory map
The PPB is part of the defined ARM bus architecture and provides access to select
processor-local modules. These resources are only accessible from the core; other system
masters do not have access to them.
Table 4-4. PPB memory map
System 32-bit Address Range Resource
0xE000_0000–0xE000_0FFF Instrumentation Trace Macrocell (ITM)
0xE000_1000–0xE000_1FFF Data Watchpoint and Trace (DWT)
Table continues on the next page...
Private Peripheral Bus (PPB) memory map
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
160
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