Information
Section number Title Page
23.7.7 Watchdog Refresh register (WDOG_REFRESH).......................................................................................496
23.7.8 Watchdog Unlock register (WDOG_UNLOCK).........................................................................................496
23.7.9 Watchdog Timer Output Register High (WDOG_TMROUTH).................................................................496
23.7.10 Watchdog Timer Output Register Low (WDOG_TMROUTL)..................................................................497
23.7.11 Watchdog Reset Count register (WDOG_RSTCNT)..................................................................................497
23.7.12 Watchdog Prescaler register (WDOG_PRESC)..........................................................................................498
23.8 Watchdog operation with 8-bit access..........................................................................................................................498
23.8.1 General guideline.........................................................................................................................................498
23.8.2 Refresh and unlock operations with 8-bit access.........................................................................................498
23.9 Restrictions on watchdog operation..............................................................................................................................499
Chapter 24
Multipurpose Clock Generator (MCG)
24.1 Introduction...................................................................................................................................................................503
24.1.1 Features........................................................................................................................................................503
24.1.2 Modes of Operation.....................................................................................................................................507
24.2 External Signal Description..........................................................................................................................................507
24.3 Memory Map/Register Definition.................................................................................................................................507
24.3.1 MCG Control 1 Register (MCG_C1)...........................................................................................................508
24.3.2 MCG Control 2 Register (MCG_C2)...........................................................................................................509
24.3.3 MCG Control 3 Register (MCG_C3)...........................................................................................................510
24.3.4 MCG Control 4 Register (MCG_C4)...........................................................................................................511
24.3.5 MCG Control 5 Register (MCG_C5)...........................................................................................................512
24.3.6 MCG Control 6 Register (MCG_C6)...........................................................................................................513
24.3.7 MCG Status Register (MCG_S)..................................................................................................................515
24.3.8 MCG Status and Control Register (MCG_SC)............................................................................................516
24.3.9 MCG Auto Trim Compare Value High Register (MCG_ATCVH)............................................................518
24.3.10 MCG Auto Trim Compare Value Low Register (MCG_ATCVL)..............................................................518
24.3.11 MCG Control 7 Register (MCG_C7)...........................................................................................................518
24.3.12 MCG Control 8 Register (MCG_C8)...........................................................................................................519
K20 Sub-Family Reference Manual, Rev. 1.1, Dec 2012
Freescale Semiconductor, Inc.
Preliminary
19
General Business Information